In order to provide customers with products that have improved capabilities, it may be desirable to improve the performance of the processor within the product so that the product may operate faster or offer new features. One technique to improve the performance of a processor is to include a cache within the core of the processor. A cache may be used to pre-fetch instructions and/or data that the processor is likely to request in upcoming instruction cycles.
When the processor requests an instruction or a piece of data, the request may be compared against a tag array to determine if the data requested is stored in the cache. If a match is found in the tag array, then a cache “hit” has occurred. Accordingly, the stored information or data may then be provided by the cache. If the requested information is not in the cache, then a cache “miss” has occurred and the information may have to be retrieved from other sources.
In some applications, it may be desirable to arrange the cache into sub-regions, commonly referred to as ways. This may provide more efficient use of the cache since portions of the cache may be designated to store more frequently requested information. If a cache miss has occurred, the information is not in one of the ways of the cache. Consequently, the information is retrieved from a slower memory source and stored in one of the ways of the cache. Often, the information is stored in the way that has been least recently used (LRU). However, conventional LRU replacement techniques do not provide any prioritization of the ways. Consequently, the least recently used way may be overwritten with the new data (e.g., victimize) even though it contains information at may be requested by the processor in the near future.
Thus, there is a continuing need for better ways to improve the efficiency of a cache.
It will be appreciated that for simplicity and clarity of illustration, elements shown in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals may be repeated among the figures to indicate corresponding or analogous elements.